The CAD Library of the Future PCB Designerens kunnskaper om hvordan man skal bygge et CAD biblioteks komponenter, er nøklen til å automatisere all elektronikk produktutvikling sett i et framtidig perspektiv. .

Presentert av: Transidé AS Jan-Erik Johansen DNU 07. 09 Presentert av: Transidé AS Jan-Erik Johansen DNU 07. 09.07 på vegne av Tom Hausherr Director of Technology PCB Libraries, Inc. Tom@PCBLibraries.com

INTRODUKSJON Elektroniske komponenter krever at det er loddepader i PCB Layout. Loddepader kan kategoriseres i to kategorier….. Møte industri standard vilkår for å kunne automatisere produksjonen. 2. Mislykkes i å møte industri standard vilkår og skape kaos i produksjonen.

INTRODUKSJON Framtidens CAD Bibliotek vil være et “One World Standard Library” som er et akseptert grunnlag for utforming, bygget på erfaring fra elektronikkindustrien, hvor trend og muligheter er hentet fra alle sektorer som kretsdesign, PCB Design produksjon og montasje sett i sin helhet som prosess. De følgende sider illustrerer hva som er nødvendig for å oppnå dette.Men først, la oss se hvilke nøkkelorganisasjoner som er involvert for å oppnå standardiseringen.

STANDARDS ORGANIZATIONS World Standard CAD Library

LAND PATTERN NAMING CONVENTION Family Pitch Lead Span Pin Qty SO 1.27 7.10 14 SOP 0.65 SSOP 0.50 TSOP TSSOP Note: An Odd Pin Qty = Thermal Tab in Center P

LAND PATTERN NAMING CONVENTION SOP = Small Outline Package T = Thin or component height 1.6mm or smaller S = Shrink or pin pitch less than 0.625mm Pitch = Two places past both sides of the decimal point followed by a “P” (50P = 0.50mm) Lead Span = Two places past both sides of the decimal point followed by a “X” (710 = 7.10mm) Height = Two places past both sides of the decimal point followed by a “-” (120- = 1.20mm) Naming Convention for Gull Wing Lead Parts: Thin + Shrink + Family + Pitch + Lead Span X Height - Pin Qty + Environment Level (L, N or M) Example: TSSOP50P710X120-14N

JEDEC Component Lead Forms

SOLDER JOINT TOLERANCE Component Lead Space Tolerance Solder Joint Tolerance er den innvendige dimensjon mellom komponent terminalene. Normalt representert av “S” symbol. Brukes til å kalkulere “HEEL” i loddeforbindelsen.

SOLDER JOINT TOLERANCE Land Pattern Pad Length Tolerance “G” dimensjon brukes for å kalkulere minimum og maximum innside avstand mellom lodde pad. “Z” dimensjon brukes for å kalkulere minimum og maximum utside avstand mellom lodde pad.

Solder Joint Toe, Heel and Side Goal SOLDER JOINT ANALYSIS Solder Joint Toe, Heel and Side Goal Tabellen under viser et eksempel på Gull Wing komponent “Solder Joint Goal”

SOLDER JOINT ANALYSIS The illustration below provides a graphical representation of the Gull Wing component lead to calculate the Toe, Heel and Side minimum and maximum values

Solder Joint / Land Protrusion SOLDER JOINT ANALYSIS Solder Joint / Land Protrusion

Produksjonstoleranse Fabrikasjons toleranse Montasje toleranse Komponent terminal tolerances

Målsettinger for loddeforbindelser

ZERO COMPONENT ORIENTATION The Component Zero Orientation relates to the Pick & Place machine tape and reel and component tubes. The rotation of the actual component in the tube or tape & reel is referred to as the Zero Orientation for the CAD Library part and how it should be built in the CAD library. All CAD Library parts should be built in the CAD system in the same rotation that the component is packaged in the tape and reel or assembly feeder tube. The JEDEC JEP95 & EIAJ 481 are the industry guidelines for component packaging information and Component Zero Orientation.

ZERO COMPONENT ORIENTATION Chip Capacitors, Resistors and Inductors – Pin 1 on Left Molded Capacitors, Resistors and Inductors – Pin 1 (Positive or Cathode) on Left MELF Resistors and Diodes – Pin 1 (Positive or Cathode) on Left SOT Devices (SOT23, SOT223, SOT89, SOT143) – Upper Left TO252 & TO263 (DPAK Type) Devices – Upper Left Small Outline Gullwing ICs (SOIC, SOP, TSOP, SSOP) – Upper Left Ceramic Flat Packs (CFP) – Pin 1 Upper Left Small Outline J Lead ICs (SOJ) – Pin 1 Upper Left Quad Flat Pack ICs (PQFP, SQFP) – Pin 1 Upper Left Ceramic Quad Flat Packs (CQFP) – Pin 1 Upper Left Bumper Quad Flat Pack ICs (BQFP) – Pin 1 Top Center Plastic Leaded Chip Carriers (PLCC) – Pin 1 Top Center Leadless Chip Carriers (LCC) – Pin 1 Top Center Quad Flat No-Lead ICs (QFN) – Pin 1 Upper Left Ball Grid Arrays (BGA) – Pin A1 Upper Left

LAND PATTERN ORIGIN PAD mønstrets origo er komponentens “Center of Gravity” i de fleste tilfeller sentret av biblioteksfiguren. Et eksempel hvor det ikke er tilfelle er DPAK eller TO-252 komponent.

PLACEMENT COURTYARD Den primære bruk av “placement courtyard” er å gi PCB designer retningslinjer for å plassere kompo-nentens pader slik at komponenter kan plasseres ved siden av hverandre med nok plass til å kompensere for komponentens toleranser.

LAND PATTERN COURTYARD DETERMINATION

SILKSCREEN OUTLINE Silkscreen outlines are used for cosmetic purposes only and are really not required by manufacturing. The silkscreen can be drawn by the PCB designer very complex to illustrate their creative talent or very simple. In the end, it really doesn’t matter because you can only see it when the physical PC board passes between the fabrication facilities to the assembly shop. Once the parts are assembled, all the silkscreen outlines are covered up and cannot be seen. When PCB designers start to use all the principles discussed in this outline, the manufacturing assembly process can be fully automated and silkscreen component outlines will not be required.

SILKSCREEN POLARITY MARKINGS The term Polarity Marking came from its use to identify the Positive Pin on a “Polarized” capacitor. But polarity marking is also used on Diodes to indicate the Cathode Pin. Polarity Markings are also used when there is a potential for inverting the part placement in the assembly process that would result in a malfunction of the component. MELF DIODE OSCILLATOR CAPACITOR

ASSEMBLY OUTLINE The assembly drawing outline should represent the maximum outline of the component body. Unlike the silkscreen outline which has to be created to avoid solder pads (a fake component outline); the assembly outline only gets placed on an assembly drawing that goes to the assembly shop. Here is some sample assembly drawing component outlines in relationship to the solder pad

ASSEMBLY POLARITY The assembly Polarity Marking is sometimes totally different than the silkscreen Polarity Marking because the silkscreen must avoid touching the component solder pad

SMT PADSTACKS En overflatekomponents padstack består av loddepad, loddemaske og pastamaske. Vi har tidligere sett på hvordan vi konstruerer en loddepad. I utgangspunktet er loddemasken og pastamasken lik loddepaden. Solder Mask – Man kan tillate mønsterkort-produsenten til å øke maskens størrelse til den teknologi fabrikanten bruker for å kunne garantere at det ikke kommer lakk på padene. Solder Paste – Man kan tillate at stensil blir laget I samsvar med montasjebedriftens krav til størrelse og utforming for å oppnå optimal loddeprosess.

THROUGH HOLE PADSTACKS Typisk padstack for hullmonterte komponenter: Primary Side Solder Mask Primary Side Pad Inner Layer Pad Plane Anti-pad Plane Thermal Relief Secondary Side Pad Secondary Side Solder Mask Drilled Hole

3D COMPONENT OUTLINE Every CAD tool has a different approach to handling 3D Models of component data. Some are much more elaborate than others. The CAD Library of the Future will have 3D Model attributes built into every land pattern to use as a mechanical drafting aid for the reduction of errors in product packaging.

3D COMPONENT OUTLINE This is sample 3D model of a PCB design imported into Solidworks. This will increasingly become more popular as technology expands its limits

IPC-7351 3-Tier LIBRARY SYSTEM Three land pattern geometry variations are supplied for each of the device families; maximum land protrusion (Density Level A), median land protrusion (Density Level B) and minimum land protrusion (Density Level C).  Density Level A: Maximum (Most) Land Protrusion – For low-density product applications, the 'maximum' land pattern condition has been developed to accommodate wave or flow solder of leadless chip devices and leaded gull- wing devices. The geometry furnished for these devices, as well as inward and “J”-formed lead contact device families, may provide a wider process window for reflow solder processes as well. Density Level B: Median (Nominal) Land Protrusion – Products with a moderate level of component density may consider adapting the 'median' land pattern geometry. The median land patterns furnished for all device families will provide a robust solder attachment condition for reflow solder processes and should provide a condition suitable for wave or reflow soldering of leadless chip and leaded gull-wing type devices. Density Level C: Minimum (Least) Land Protrusion – High component density typical of portable and hand-held product applications may consider the 'minimum' land pattern geometry variation. Selection of the minimum land pattern geometry may not be suitable for all product use categories. The use of classes of performance (1, 2, and 3) is combined with that of component density levels (A, B, and C) in explaining the condition of an electronic assembly.  As an example, combining the description as Levels 1A or 3B or 2C, would indicate the different combinations of performance and component density to aid in understanding the environment and the manufacturing requirements of a particular assembly.

IPC-7351 3-Tier LIBRARY SYSTEM

IPC-7351 Libraries PCB Libraries builds all “IPC-7351 Standard SMT Library Parts”, in many different CAD formats. One of PCB Libraries goals is to build every standard part in the world and offer it on www.PCBLibraries.com eventually to every CAD Tool via IPC-2581 format. Here is a list of Standard IPC-7351 SMT parts: BGA QFP SQFP TQFP SOIC SOP TSOP TSSOP QFN SOJ PLCC SOT MELF LCC CFP CQFP Chip Resistor, Capacitor and Inductor Aluminum Electrolytic Capacitors Tantalum Capacitor Molded Inductor Wire Wound Inductor Molded Resistor, Diode TO Packages Oscillators and Chip Array’s

IPC-2581 NEUTRAL CAD FORMAT A neutral CAD database format has always been a known fact to support electronic product design and development and failure to create and accept a neutral CAD database format has stifled the automation process. The IPC-2581 neutral CAD database format will fulfill a 30 year search for a universal acceptable format. This one single aspect can greatly accelerate the process of all electronic product development because it is the common language between all machines: The CAD system, the fabrication equipment and the assembly equipment. The IPC-2581 provides component manufacturers a solution to build their own CAD land patterns using a single intelligent database format that can be imported into every CAD tool.

TRANSITIONING TO THE METRIC SYSTEM The United States is now the only industrialized country in the world that does not use the metric system as its predominant system of measurement. All the World Standard Groups involved in the electronics industry (IPC, IEC, NIST, JEDEC, EIA & JEITA) have made the transition to the metric measurement system. They formed an alliance to stop using English units and all the data they publish is in metric units.

TRANSITIONING TO THE METRIC SYSTEM The current effort toward national metrication is based on the conclusion that industrial and commercial productivity, mathematics and science education, and the competitiveness of American products and services in world markets, will be enhanced by completing the change to the metric system of units. Failure to complete the change will increasingly handicap the Nation's industry and economy.

TRANSITIONING TO THE METRIC SYSTEM The “CAD Library of the Future” will be built in metric units

Nedre vei 8, Horten Industripark PCB Library for IPC 7351A selges av oss, ta kontakt for demo, evalueringslisens og levering Nedre vei 8, Horten Industripark Postboks 368, N-3193 Horten Telefon: +47 33035311 Direkte linjer: Jan-Erik Johansen 33035314, 91735314 EMail:transide@transide.no www.transide.no